Metering apparatus

ABSTRACT

Metering apparatus with a bank of number wheel indicators has wiper and position contacts to provide an electrical indication of the meter reading. The contacts are scanned in a measurement mode and, in an alternating test mode, test signals are imposed upon the position contacts and the output again scanned. In this way, a contact validation output is generated from which faults such as contact short circuits can be detected by the remote meter reading apparatus.

This invention relates to metering apparatus and in the most importantexample to apparatus for metering usage of public utilities such as gasand water.

There have been many proposals made for utility metering apparatus whichprovides not only a visual representation of meter output but also anencoded electrical output which can be "read" by interrogation over asuitable communications link or through the use of portable meterreading apparatus. Conventional metering apparatus empolys a bank ofnumber wheels driven to represent the meter output and attention hasbeen focused on adapting such apparatus to provide an encoded output.

In certain prior proposals, a wiper contact on each number wheel makescontact successively with an array of position contacts. By applyingappropriate electrical signals to the wiper contacts and monitoring thesignals appearing on the position contacts, it is possible to provide anelectrical output representative of the number wheel positions. It willbe apparent that utility metering apparatus is required to operatesubstantially continuously without maintenance over extremely longperiods of time. Because of wear or corrosion, mechanical faults mayoccasionally arise in the contact structures. Such faults will notnecessarily prevent operation of the apparatus but will often result inerroneous electrical indications of the meter reading. Thus, forexample, spreading of contacts through wear, or the deposition ofconducting material between contacts, can lead to short circuiting oftwo or more adjacent position contacts. Such short circuiting can leadto significant errors in the meter reading. Whilst the likelihood of afault arising on any particular meter is small, the potentially largenumber of meters to be included in a utility billing system and thesignificance of any error in the amount billed for utility usage, meansthat this problem demands careful attention.

It is an object of this invention to provide improved metering apparatushaving provision for detection of such faults as outlined above.

Accordingly, the present invention consists in metering apparatuscomprising a metering device having an output; a plurality of indicatorelements driven in response to the meter output such that theorientation of the respective indicator elements is indicative of themeter output; for each indicator element an array of position contacts,corresponding position contacts from each said array being connectedwith a corresponding one of a plurality of position terminals, and awiper contact disposed to make contact successively with the positioncontacts of the array on driving of the corresponding indicator element;generator means for applying, in a measurement mode, measurement signalsin sequence to the wiper contacts and for applying, in a test modealternating with the measurement mode, test signals in sequence to theposition terminals; encoder means connected with the position terminalsand adapted to provide an encoded output representative of the signalson said position terminals; and data output means arranged to receivesaid encoded output and adapted, in synchronism with operation of thegenerator means, to provide a data output, said data representing in themeasurement mode the position of the respective indicator elements and,in the test mode, a test output in which departure from a predeterminedvalue is representative of short circuiting of two or more positioncontacts.

The invention will now be described by way of example with reference tothe accompanying drawings in which:

FIG. 1 is a block diagram illustrating electronic circuitry forming partof metering apparatus according to this invention;

FIG. 2 is a somewhat diagramatic section through mechanical parts ofmetering apparatus according to this invention;

FIGS. 3 to 8 are more detailed circuit diagrams of respective parts ofthe circuits shown in block form in FIG. 1;

FIG. 9 is a timing diagram illustrating the operation of the circuitryshown in FIG. 1;

FIG. 10 is a logic truth table illustrating the operating of thecircuitry shown in FIG. 1;

FIG. 11 is a block diagram illustrating an interface for connection withthe circuitry of FIG. 1; and,

FIG. 12 is a circuit diagram, partly in block form, illustrating theinter-relationship between the elements shown in FIGS. 1 and 11.

Referring initially to FIG. 1, block 1 schematically represents a numberwheel contact array and a series of serial number links. For theplurality of indicator elements in this example, a bank of six numberwheels is assumed with, as shown in FIG. 2, each number wheel 2 having awiper contact (W1 to W6). A main circuit board 4 carries three contactboards 6 which are interposed between corresponding pairs of numberwheels. Each contact board carries on both sides an array of tencircumferentially disposed position contacts 8. It will be understoodthat as each number wheel rotates, the corresponding wiper contactestablishes electrical connection successively with the positioncontacts on the opposing circuit board face. Corresponding positioncontacts from each array are connected together through tracks on thecircuit boards and communicate with a corresponding one of ten positionterminals (D0 to D9). Thus, for example, all six position contactscorresponding with position "0" of the corresponding number wheel areconnected together and communicate with position terminal D0.

The metering apparatus additionally comprises eight serial contacts (S1to S8) which (in a manner not apparent from FIG. 2) are connectedthrough fixed links to a particular one of the position terminals D0 toD9. These links are set at the time of assembly of the meteringapparatus and enable the definition of a unique serial number for eachproduct. It will be understood that the main circuit board 14additionally carries the integrated circuits and other componentsembodying the electronic circuitry of FIG. 1.

It may be helpful to outline the operation of the circuitry shown inFIG. 1 before the various circuitry elements are described in detail.Thus, in response to SCAN CLOCK signals provided by a serialiser unit 12driven from a clock generator 14, a scan generator 16 causes, throughwiper drive 18, a logical LOW signal to be applied in a pre set sequenceto the six wiper contacts W1 to W6 and the eight serial number contactsS1 to S8. An encoder which comprises an input decoding unit 20 and acode modifier unit 22, monitors the signals appearing upon the positionterminals D0 to D9 at each point in this sequence and provides anencoded signal in parallel form to the serialiser 12. This parallelinput is scanned in synchronism with the application of logic signals tothe wiper and serial number contacts and a serial ASCII output isproduced at output terminal 24. This ASCII output includes sixcharacters representing the positions of the six number wheels and eightcharacters representing the unique serial number. A forced input unit 26interposed between the position terminals D0 to D9 and the inputdecoding unit 20 is operative during validation modes - which alternatewith these measurement modes - to provide validation of the electricalcontact integrity.

The apparatus according to this invention will now be described in moredetail with reference to FIG. 1 and, in turn, to FIGS. 3 to 9. It willalso be helpful to refer at times to the timing diagram which is FIG. 9and the logic truth table which is FIG. 10.

Referring to FIG. 3, the clock generator 14 comprises a divider 50(4040), inverters 52, 54 and 56; AND gate 58 and OR gate 60. Theexternal clock input at 1,200 pulses per second is supplied throughinverter 52 to the clock input of divider 50 and also to a SYSTEM CLOCKLINE which is connected with the serialiser 12. The 2⁴ output of thedivider is AND'ed in gate 58 with the 2⁹ output inverted in inverter 54,to produce a TRIGGER output which comprises sixteen trigger pulses, eachcorresponding with sixteen SYSTEM CLOCK pulses, followed by a gapequivalent in time to sixteen trigger pulses. Referring to the timingdiagram which is FIG. 9, line a) illustrates the TRIGGER output withline d) illustrating--to a considerably enlarged scale--one period ofthe TRIGGER output. The remaining lines of FIG. 9 correspond to the timescale of line d); thus line b) shows the sixteen SYSTEM CLOCK pulsesoccuring within a single trigger output period. The 2⁹ output of divider50, through inverters 54 and 56, is OR'ed in gate 60 with a manual reset(MR) input which is connected additionally with the divider 50 and withthe serialiser unit 12.

Referring now in part to FIG. 8, the serialiser unit 12 comprises adecade counter 62 (4017) which receives as a clock input the SYSTEMCLOCK line. The decade counter 62 additionally receives the MR linethrough OR gate 64. Of the ten output lines of counter 62, only linesQ0, Q1 and Q9 are utilised. Line Q0 serves through inverter 66 toproduce a SCAN CLOCK signal which is illustrated at line f) of the FIG.9 timing diagram.

Referring now to FIG. 4, the scan generator 16 receives the SCAN CLOCKline as the clock input to a counter 70 (4520). Counter 70 provides abinary output on lines 2⁰, 2¹, 2² and 2³ which are connected tocorresponding inputs of two three to eight line converters 72 and 74 (HC138). Enabled alternately by the 2³ output of counter 70, these twoconverters (as will well be understood by those skilled in the art)operate as a four to sixteen line converter of the counter output. Thesixteen output lines are labelled Y0 to Y15. Thus, as the SCAN CLOCKpulses are received, the output lines Y0 to Y15 are activated insuccession. Negative logic is employed, and activation comprises thepulling LOW of the corresponding scan generator output Y0 to Y15. Thescan generator 16 additionally comprises a flip flop 76 driven by the 2³output of counter 70 through inverter 78. The flip flop 76 provides PQand PQ outputs.

At reset, scan generator Y0 is LOW and all other generator outputs areHIGH. The PQ flag is LOW. On receipt of the first sixteen SCAN CLOCKpulses, the generator outputs are pulled LOW in sequence. At thebeginning of a second series of sixteen pulses, the PQ flag goes HIGHand the scan generator outputs Y0 to Y15 are again pulled LOW insequence. The first sixteen pulses, with PQ=LOW, represent a normalmeasurement cycle or mode. The second sequence of sixteen pulses withPQ=HIGH represents a mechanics validation cycle as will be described inmore detail below.

Referring now to FIG. 5, the wiper driver 18 comprises two octal buffers80 and 82 (HC 244) which both receive the PQ line as an enabling inputand receive between them the scan generator outputs Y1 to Y14. Scangenerator outputs Y0 and Y15 are not required in the scanning of sixwiper contacts and eight serial number links and are used, as we willdescribe, to generate fixed ASCII character identifiers. The buffers 80and 82 provide an open drain output transistor for each of the six wipercontacts W1 to W6 and eight serial number links S1 to S8. In themeasurement mode, with PQ=LOW, the buffers are enabled and the outputtransistors are turned ON in sequence. Thus a LOW signal of scangenerator output Y1, for example, will result in wiper contact W1 beingpulled LOW. In the mechanics validation cycle, with PQ=HIGH, the buffersare disabled and all output transistors are turned off. All the bufferoutputs are therefore high impedance and the wiper contacts and theserial number links are effectively permitted to float. A diode 84 isprovided on each output line of the buffers 80 and 82 so as to preventinteraction between adjacent lines.

Turning now to FIG. 6, the position terminals D0 to D9 are connectedrespectively with inputs D'0 to D'9 of the input decoding unit 20. Eachof these connecting lines is additionally connected through a diode 90with one of a series of OR gates 92. Each OR gate 92 receives as oneinput the PQ signal and as the other input the corresponding one of thescan generator outputs Y1 to Y10.

In the measurement mode, PQ=LOW and the output of each OR gate 92 isconsequently high. The diodes 90 then effectively isolate the OR gates92 from the connecting lines between position terminals D0 to D9 and theinput decoding unit 20. In the mechanics validation mode, PQ=HIGH and,as has been described, the position terminals D0 to D9 "see" a highimpedence through the wiper contacts and serial number links. Theoutputs of the OR gates 92 are controlled by the scan generator outputsY1 to Y10 so that the inputs D'0 to D'9 of the input decoding 20 arepulled LOW in sequence. During this mode, inputs to the decoding unit 20thus correspond with inputs representing number wheel positions 0-9,successively.

It will be understood that in a fault condition where two adjacentposition terminals D0 to D9 are short circuited, this sequence 0-9 willbe disrupted since the step of pulling down one of the short circuitedposition terminals will clearly also pull down the adjacent positionterminal. The manner in which a departure from the expected sequence isdetected, will be described later.

Turning now to FIG. 7, the code modifier unit 20 comprises a highpriority encoder 102 (HC147). This has 2⁰, 2¹, 2² and 2³ outputs whichprovide a binary indication of, in the measurement mode, the position orvalue of the number wheel or serial link currently being scanned and, inthe mechanics validation mode, an effective numerical value created bythe forced inputs. The outputs from encoder 102 are connected withrespective AND gates 104, second inputs of which are connected with aninverter 106. This is connected in turn with the output of a NOR gate108 receiving the outputs of two NAND gates 110. These NAND gatesreceive as inputs the same signals applied to inputs D'0 to D'9 of theencoder 102. The function of the gates 106, 108 and 110 is to detect the"all contacts open-circuit" condition and, through AND gates 104,effectively disable the encoder in those circumstances. The outputs ofthe AND gates are connected with the inputs of respective NOR gates 108,with the other inputs of each NOR gate being connected to the output ofa NAND gate 110 receiving Y0 and Y15 as inputs. Thus, if Y0 and Y15 areboth HIGH (which will be the case during scanning of the six wipercontacts and eight serial number links as lines Y1 to Y14 aresuccessively pulled LOW). The input decoding unit 20 will provide abinary coded decimal output to the code modifier unit 22. If either ofY0 or Y15 is LOW, the outputs of NOR gates 108 are pulled LOW,effectively disabling the input decoder.

The manner of operation of the input decoder unit 20 may be furtherclarified by study of the truth table which appears as FIG. 10. In thattruth table the conventional notation is adopted with H=HIGH; L=LOW andX="irrelevant".

The code modifier unit 22 is also shown in FIG. 7. It receives theparallel output lines from the input decoding unit 20 together with Y0,Y15, PQ and PQ. The code modifier unit 22 provides an output on sixparallel lines to the serialiser 12. Referring both to FIG. 7 and thetruth table which is FIG. 10, it will be apparent that if both Y0 andY15 are HIGH (that is to say during scanning of the wiper contacts andserial number links), the output from the input decoder is passeddirectly to the serialising unit 12 and appears as an ASCII numericalcharacter 0 to 9. The code modifier serves the purpose of inserting codefor an appropriate ASCII character at the beginning and end of eachsixteen pulse sequence. Thus if Y0=PQ=LOW (representing the commencementof a first sequence of sixteen pulses) then code for the ASCII character"K" is passed to the serialiser unit. If Y0=LOW and PQ=HIGH(representing the first pulse in a second series of sixteen pulses),then code for the ASCII character "M" is produced. If Y15=LOW, the codefor the ASCII character CR or "return" is forced irrespective of thestate of PQ, that is to say at the end of both the first and secondsixteen pulse sequences. If all wiper contacts are open circuit (asdeleted by the NAND gates 110) the ASCII character "?" is generated.

Referring now to FIG. 8, the serialiser 12 comprises an eight bitparallel to serial converter 120 (4014). This receives as inputs the sixoutput lines from the code modifier unit 22, the line Y0 and a parityline generated in parity generator 122 and gated by AND gate 124. Asillustrated schematically in FIG. 8, the parity generator 122 receivesthe other inputs to the parallel to serial converter. AND gate 124additionally receives line Q1 from decade counter 62. The converter 120further receives as a clock input the SYSTEM CLOCK line and as aparallel/serial load flag the output of the NOR gate 126. The inputs tothis NOR gate 126 are, respectively, the SCAN CLOCK line and the outputof a latch formed by paired NOR gates 128 and 130 receiving asrespective inputs the TRIGGER line and output Q9 from the decade counter62.

The manner of operation of the serialiser 12 can now be understood.

At reset, output Q0 is HIGH so that converter 120 is in a parallel loadmode and eight bits are loaded. These comprise a start bit(corresponding to the permanently high connection of the first inputterminal to the converter 120). Six "derived" data bits from the codemodify unit 22 and a seventh data bit which is effectively Y0.Generation of the 7th data bit can be simplified in this manner as canbe verified by inspection of the truth table. As Q0 goes LOW (refer toFIG. 9i), the converter is switched to serial load so that, whilst Q1 isLOW, parity data is clocked in (see FIG. 9j). As the serial datacontinues to clock out, gate 124 effectively isolates the partiygenerator so that zeros are clocked in, in series. The first of thesezeros is technically a stop bit. The serial output is illustrated atFIG. 9c).

It will be understood that the ASCII output from the serialiser will inthe case of normal operation take the form:

    KN.sup.1 N.sup.2 N.sup.3 N.sup.4 N.sup.5 N.sup.6 S.sup.1 S.sup.2 S.sup.3 S.sup.4 S.sup.5 S.sup.6 S.sup.7 S.sup.8 [CR] MO123456789????[CR]

Where N¹ to N⁶ represent numeric characters indicating the position ofthe six number wheels and, similarly, S¹ to S⁸ are numeric charactersproviding the unique serial number. The characters 0 to 9 in the secondpulse sequence arise directly from the input forcing of the test ormechanics validation mode. The question mark characters represent anopen circuit condition on all contacts.

In the case of a mechanical fault leading, for example, to a shortcircuit between position contacts four and five on one of the numberwheels, the scan signal Y4 will, in the forced input operation of thetest mode, cause a LOW to appear not only on input D'4 of the inputdecoding unit 20, but also on input D'5, via the mechanical shortcircuit. Since the input decoder operates on higher value expected "4".In this case, the 16 character ASCII in the test mode would be:

    M0123556789????[CR].

This departure from the predetermined sequence can readily be identifiedas an error.

Turning now to FIG. 11, there is shown diagramatically an interface foruse with the encoding circuitry described above. The function of thisinterface is to take power from a portable reading device held inproximity to the interface and to transmit data to the device on demand.The interface includes power and data coils L1 and L2 respectively.These are mounted at a suitable location to enable a probe or other partof the reading unit to be positioned with corresponding coils in theprobe being inductively linked with the coils L1 and L2 as shownschematically in the drawing.

Coil L1 feeds a power supply unit 200 which in generally conventionalmanner is provided with a rectifying bridge network, smoothingcapacitors and voltage protection Zener diodes. The power supply unit200 has a rectified but unregulated output on line 202; a rectified andregulated output on line 204 and an alternating output f_(in). Thisalternating output is applied as a clock input to a multiplexer 206which has an output switched at the frequency f_(in) between theregulated supply rail 204 and ground. The output of multiplexer 206 isconnected to a binary divider 208. Output line 2^(x) of the divider isconnected as a clock input to a further multiplexer 210 which has inputsconnected respectively with output 2^(y) of divider 208 and theregulated supply rail 204. In this way the output of the multiplexer 210is switched between the supply rail and the output 2^(y) at a frequencycorresponding to the output 2^(x). By appropriate selection of theintegers x and y an appropriate mark space ratio is created. The outputof multiplexer 210 is connected with a driver stage 212 providing onterminal pair T1 both the clock input and power to the previouslydescribed encoder circuitry.

The output from the serialiser 12 is connected on terminal paid T2 asthe clock input to a further multiplexer 214 having inputs which arerespectively connected to the ground rail and permitted to float. Thismultiplexer accordingly functions as an inhibitor. The output ofmultiplexer 214 is connected as the control input to a Colpittsoscillator 216 with the output data coil L2 being connected across theoutput of the oscillator and the unregulated supply rail. Thereaccordingly appears across the output coil L2 a modulated signalrepresentative of the ASCII output of the above described encoder.

The manner of interconnection of the interface shown in FIG. 11 with thecircuitry of FIG. 1, is more easily described with reference to FIG. 12.Here, the block 300 designates the circuit elements of FIG. 1 with theexception, of course, of the contacts and serial number linksrepresented by block 10.

The combined power and clock input on terminal T1 is rectified andsmoothed through diode D1 and capacitor C1. Voltage regulation isprovided by resistance R1 and Zener diode ZD1, whilst capacitor C3serves as noise suppression. Terminal T1 is further connected throughresistance R2 to the base of npn transistor TR1, resistance R4 servingin turn to connect the base of TR1 with ground. The collector of TR1serves to provide the CLOCK input with capacitor C2 again serving asnoise suppression.

The SERIAL OUTPUT line is connected through resistance R3 with the baseof npn transistor TR2, the collector of which is connected with terminalT2.

In a preferred form of this invention, the circuit elements comprisedwithin block 300 are embodied in a single application specificintegrated circuit.

It should be understood that this invention has been described by way ofexample only and a wide variety of modifications are possible withoutdeparting from the scope of the invention. Thus other arrangements ofposition indicated with wiper and position contacts will be possible, itmerely being necessary that for each indicator element there is providedan array of position contacts and a wiper contact which successivelymakes contact with these position contacts as the indicator element isdriven. The wiper contact may be the stationary element. The indicatorelements may of course take a variety of forms other than the describedcoaxial number wheels. The use of fixed serial number links which arescanned along with the wiper contacts is believed to be advantageous butis not an essential feature of this invention.

It will be apparent to the skilled man that there are many ways otherthan the described circuitry for applying measurement signals insequence to the wiper contacts and for applying, a test mode, testsignals to the position terminals. Similarly, the input decoding unitcould be replaced by a variety of other forms of encoder means, whichneed not necessarily include perform the additional function of thedescribed code modifier unit.

The described interface could be replaced by alternative designs or by apermanent power supply and fixed data links. Still further interfacescould be provided for other methods of remote interrogation of the meterreading.

I claim:
 1. Metering apparatus comprising a metering device having anoutput; a plurality of indicator elements driven in response to themeter output such that the orientation of the respective indicatorelements is indicative of the meter output; for each indicator elementan array of position contacts, corresponding position contacts from eachsaid array being connected with a corresponding one of a plurality ofposition terminals, and a wiper contact disposed to make contactsuccessively with the position contacts of the array on driving of thecorresponding indicator element; generator means for applying, in ameasurement mode, measurement signals in sequence to the wiper contactsand for applying, in a test mode alternating with the measurement mode,test signals in sequence to the position terminals; encoder meansconnected with the position terminals and adapted to provide an encodedoutput representative of the signals on said position terminals; anddata output means arranged to receive said encoded output and adapted,in synchronism with operation of the generator means, to provide a dataoutput, said data representing in the measurement mode the position ofthe respective indicator elements and, in the test mode, a test outputin which departure from a predetermined value is representative of shortcircuiting of two or more position contacts.
 2. Apparatus according toclaim 1, wherein said generator means comprises scan generator meanshaving a plurality of sequentially energized outputs connectedrespectively with said wiper contacts through buffer means, said buffermeans being enabled during said measurement mode and disabled duringsaid test mode.
 3. Apparatus according to claim 2, wherein at least someof said scan generator outputs are connected through a forced input unitwith the respective position terminals, said forced input unit disablingthe connection of said scan generator outputs during said measurementmode and enabling the connection of said scan generator outputs duringsaid test mode.
 4. Apparatus according to claim 3, said generator meansfurther comprising means for generating a binary test flag the states ofwhich are indicative of respectively the test and measurement modes. 5.Apparatus according to claim 4, wherein said forced input unit iscontrolled by said test flag.
 6. Apparatus according to claim 2, whereinthe scan generator means comprises additional outputs energizedsequentially with said outputs, the encoder means being connected toreceive said additional outputs and to generate data marker characterstherefrom.